US 11,687,115 B2
Precise time management for peripheral device using local time base
Christopher D. Finan, Cupertino, CA (US); Alexander Ukanwa, Morgan Hill, CA (US); Charles F. Dominguez, San Carlos, CA (US); Kalpana Bansal, San Jose, CA (US); Michael Bekerman, Los Gatos, CA (US); and Remi Clavel, Milpitas, CA (US)
Assigned to Apple Inc., Cupertino, CA (US)
Filed by Apple Inc., Cupertino, CA (US)
Filed on Sep. 22, 2021, as Appl. No. 17/482,178.
Prior Publication US 2023/0091434 A1, Mar. 23, 2023
Int. Cl. G06F 1/06 (2006.01); G06F 13/42 (2006.01)
CPC G06F 1/06 (2013.01) [G06F 13/423 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An apparatus comprising:
a peripheral interface circuit configured to receive information from a host circuit over a peripheral bus, wherein the host circuit is configured to maintain a global timebase in accordance with a first clock signal within a first clock domain, and wherein the peripheral interface circuit is configured to maintain, according to a second clock signal within a second clock domain, a first local timebase that is correlated to the global timebase;
a peripheral control circuit coupled to the peripheral interface circuit and configured to operate within a third clock domain, wherein the peripheral control circuit is configured to maintain, based on the first local timebase, a second local timebase, wherein the peripheral interface circuit is configured to determine phase and frequency differences between the second clock signal and the third clock signal in order to determine a correlation between the second local timebase and the first local timebase; and
a peripheral logic circuit configured to operate within the third clock domain to perform, using a third local clock signal, operations that utilize a timestamp from the second local timebase, wherein the timestamp from the second local timebase accounts for correlation with the first local timebase.