CPC H01L 43/02 (2013.01) [H01L 27/222 (2013.01); H01L 43/12 (2013.01)] | 18 Claims |
1. A magnetic memory device, comprising:
a lower interlayer insulating layer on a substrate;
a bottom electrode contact disposed in the lower interlayer insulating layer; and
a magnetic tunnel junction pattern on the bottom electrode contact,
wherein the bottom electrode contact comprises a second region and a first region, which are sequentially disposed in a first direction perpendicular to a top surface of the substrate so that the second region is between the first region and the top surface of the substrate,
wherein a first width of the first region of the bottom electrode contact is smaller than a second width of the second region of the bottom electrode contact, when measured in a second direction parallel to the top surface of the substrate, and
wherein the bottom electrode contact further comprises a third region having the second width and stacked on the first region.
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