US 11,682,722 B2
Vertical transistor structure with buried channel and resurf regions and method of manufacturing the same
Vipindas Pala, San Jose, CA (US); and Sudarsan Uppili, Portland, OR (US)
Assigned to Monolithic Power Systems, Inc., San Jose, CA (US)
Filed by MONOLITHIC POWER SYSTEMS, INC., San Jose, CA (US)
Filed on Nov. 18, 2021, as Appl. No. 17/529,747.
Application 17/529,747 is a continuation of application No. 16/786,972, filed on Feb. 10, 2020, granted, now 11,211,484.
Claims priority of provisional application 62/805,089, filed on Feb. 13, 2019.
Prior Publication US 2022/0093784 A1, Mar. 24, 2022
Int. Cl. H01L 29/78 (2006.01); H01L 29/16 (2006.01); H01L 29/423 (2006.01); H01L 29/10 (2006.01); H01L 29/808 (2006.01); H01L 29/06 (2006.01)
CPC H01L 29/7803 (2013.01) [H01L 29/063 (2013.01); H01L 29/1045 (2013.01); H01L 29/1095 (2013.01); H01L 29/1608 (2013.01); H01L 29/42368 (2013.01); H01L 29/42376 (2013.01); H01L 29/8083 (2013.01)] 16 Claims
OG exemplary drawing
 
1. A vertical transistor device, comprising:
a substrate layer of a first conductivity type;
a drift layer of the first conductivity type disposed over the substrate layer;
a body region of a second conductivity type extending vertically from a top surface of the drift layer into the drift layer, the second conductivity type being opposite to the first conductivity type;
a junction field effect transistor (JFET) region of the first conductivity type extending vertically from the top surface of the drift layer into the drift layer and disposed adjacent to an inner edge of the body region;
a source region of the first conductivity type extending vertically from the top surface of the drift layer into the body region;
a base region of the second conductivity type extending vertically into the drift layer from the top surface of the drift layer and disposed adjacent to an outer edge of the body region opposite the JFET region;
a buried channel region of the first conductivity type disposed at least partially between the body region on a first side and a dielectric region on a second side, the second side being opposite to the first side;
the dielectric region disposed over the top surface of the drift layer, the dielectric region laterally overlapping with at least a portion of the body region, the dielectric region comprising a first section and a second section that is adjacent to the first section, wherein a thickness of the second section of the dielectric region is greater than a thickness of the first section of the dielectric region, and wherein a portion of the second section of the dielectric region overlaps at least the body region and the buried channel region;
a gate electrode disposed over the dielectric region;
a drain electrode disposed below the substrate layer;
a source electrode disposed over the source region; and
a base electrode disposed over a base region, wherein the source electrode and the base electrode are isolated from each other.