US 11,682,657 B2
Semiconductor packages including a bonding wire branch structure
Chui Park, Icheon-si (KR)
Assigned to SK hynix Inc., Icheon-si (KR)
Filed by SK hynix Inc., Icheon-si (KR)
Filed on Feb. 28, 2022, as Appl. No. 17/682,904.
Application 17/682,904 is a division of application No. 16/910,821, filed on Jun. 24, 2020, granted, now 11,315,905.
Claims priority of application No. 10-2020-0003928 (KR), filed on Jan. 10, 2020.
Prior Publication US 2022/0278077 A1, Sep. 1, 2022
Int. Cl. H01L 25/065 (2023.01); H01L 23/00 (2006.01); H01L 23/528 (2006.01)
CPC H01L 25/0657 (2013.01) [H01L 23/5286 (2013.01); H01L 24/45 (2013.01); H01L 2225/06506 (2013.01); H01L 2924/3025 (2013.01)] 3 Claims
OG exemplary drawing
 
1. A semiconductor package comprising:
a package substrate;
a die stack configured to include semiconductor dies stacked on the package substrate, wherein each of the semiconductor dies includes a die pad;
an interface chip disposed on the package substrate to be spaced apart from the die stack and configured to include a first chip pad and a second chip pad;
a first bonding wire connecting the die pads of the semiconductor dies to each other and electrically connecting the die pads to the first chip pad of the interface chip; and
a second bonding wire branched from the first bonding wire and connected to the second chip pad of the interface chip,
wherein the first bonding wire includes:
a first sub-wire, a first ball portion of the first sub-wire is bonded to the die pad located at a position where the second bonding wire is branched from the first bonding wire; and
a second sub-wire, a stitch portion of which is vertically bonded onto the first ball portion,
wherein second bonding wire includes a second ball portion vertically bonded onto the stitch portion.