US 11,682,646 B2
IC chip package with dummy solder structure under corner, and related method
Manish Nayini, Wappingers Falls, NY (US); Richard S. Graf, Gray, ME (US); Janak G. Patel, South Burlingtron, VT (US); and Nazmul Habib, Colchester, VT (US)
Assigned to MARVELL ASIA PTE LTD., Singapore (SG)
Filed by MARVELL ASIA PTE, LTD., Singapore (SG)
Filed on Nov. 2, 2021, as Appl. No. 17/517,091.
Application 17/517,091 is a continuation of application No. 16/662,293, filed on Oct. 24, 2019, granted, now 11,171,104.
Prior Publication US 2022/0059488 A1, Feb. 24, 2022
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 29/40 (2006.01); H01L 21/00 (2006.01); H01L 23/00 (2006.01); H01L 23/498 (2006.01); H01L 21/48 (2006.01); H01L 21/56 (2006.01); B23K 1/00 (2006.01); H01L 23/31 (2006.01); B23K 101/40 (2006.01)
CPC H01L 24/14 (2013.01) [B23K 1/0008 (2013.01); H01L 21/4853 (2013.01); H01L 21/563 (2013.01); H01L 23/3157 (2013.01); H01L 23/49805 (2013.01); H01L 23/49816 (2013.01); H01L 23/49838 (2013.01); H01L 24/13 (2013.01); H01L 24/16 (2013.01); H01L 24/81 (2013.01); B23K 2101/40 (2018.08); H01L 2224/13211 (2013.01); H01L 2224/13239 (2013.01); H01L 2224/13247 (2013.01); H01L 2224/1403 (2013.01); H01L 2224/14517 (2013.01); H01L 2224/16227 (2013.01); H01L 2224/81125 (2013.01); H01L 2224/81815 (2013.01); H01L 2924/014 (2013.01); H01L 2924/0105 (2013.01); H01L 2924/01029 (2013.01); H01L 2924/01047 (2013.01); H01L 2924/15321 (2013.01); H01L 2924/18161 (2013.01); H01L 2924/35121 (2013.01)] 7 Claims
OG exemplary drawing
 
1. An integrated circuit chip package comprising:
a substrate comprising first mounting pads unconnected to electrical connections in the substrate;
a wafer comprising an IC chip arranged on the substrate, the wafer comprising second mounting pads that are disposed around corners of the IC chip, that extend radially outward relative to circuitry in the IC chip, that are unconnected to circuitry in the IC chip, and that mate with the first mounting pads on the substrate, respectively;
an underfill disposed between the IC chip and the substrate; and
a solder material disposed on the first mounting pads that bonds the first and second mounting pads, the solder material being disposed to prevent the underfill from being positioned directly underneath the corners of the IC chip,
wherein the wafer comprises dicing channels along sides of the IC chip and the second mounting pads extend into the dicing channels, and
wherein when the IC chip is diced, portions of the second mounting pads are diced and remainders of the second mounting pads are coplanar with the sides of the IC chip.