CPC H01L 23/5389 (2013.01) [H01L 23/3128 (2013.01); H01L 23/49811 (2013.01); H01L 23/49822 (2013.01); H01L 23/49838 (2013.01); H01L 23/5383 (2013.01); H01L 24/16 (2013.01); H01L 25/105 (2013.01); H01L 2224/16225 (2013.01)] | 20 Claims |
1. A semiconductor package comprising:
a redistribution substrate including an insulating layer and redistribution patterns in the insulating layer,
wherein each of the redistribution patterns comprises a via portion, a pad portion vertically overlapping the via portion, and a line portion extending from the pad portion,
the via portion, the pad portion, and the line portion are connected to each other to form a single object,
a level of a bottom surface of the pad portion is lower than a level of a bottom surface of the line portion, and
the line portion has a first width at a level between a top surface of the line portion and the bottom surface of the line portion, the first width being larger than both a second width of the line portion at the top surface thereof and a third width of the line portion at the bottom surface thereof, the first width, the second width, the third width being widths in a direction perpendicular to a line portion extension direction.
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