US 11,682,100 B2
Dynamic allocation of system of chip resources for efficient signal processing
David Schalig, San Francisco, CA (US); and Karsten Patzwaldt, San Francisco, CA (US)
Assigned to NVIDIA Corporation, Santa Clara, CA (US)
Filed by NVIDIA Corporation, Santa Clara, CA (US)
Filed on Mar. 29, 2022, as Appl. No. 17/707,745.
Application 17/707,745 is a continuation of application No. 16/559,475, filed on Sep. 3, 2019, granted, now 11,321,798.
Claims priority of provisional application 62/884,297, filed on Aug. 8, 2019.
Prior Publication US 2022/0222769 A1, Jul. 14, 2022
This patent is subject to a terminal disclaimer.
Int. Cl. G06T 1/20 (2006.01); G06F 9/50 (2006.01); G06T 5/00 (2006.01); G06T 5/50 (2006.01)
CPC G06T 1/20 (2013.01) [G06T 5/002 (2013.01); G06T 5/50 (2013.01); G06F 9/5066 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A system comprising:
one or more processing units comprising processing circuitry to:
determine, based at least on a processing request corresponding to input data, at least a first node corresponding to a first processing task and a second node corresponding to a second processing task, wherein the first node is coupled to the second node using a first edge that corresponds to a first process option of the first processing task, and wherein the first node is coupled to the second node using a second edge that corresponds to a second process option of the first processing task;
determine a difference between a first cost associated with the first edge and a second cost associated with the second edge;
select the first edge based at least on the processing request and the difference; and
process the input data by, at least in part, executing the first process option of the first processing task to generate processed data.