US 11,681,899 B2
Dividing neural networks
Sungho Kim, Yongin-si (KR); Yulhwa Kim, Daegu (KR); Hyungjun Kim, Pohang-si (KR); Jae-Joon Kim, Pohang-si (KR); and Jinseok Kim, Incheon (KR)
Assigned to Samsong Electronics Co., Ltd., Gyeonggi-do (KR); and POSTECH ACADEMY-INDUSTRY FOUNDATION, Gyeonsangbuk-Do (KR)
Filed by Samsung Electronics Co., Ltd., Suwon-si (KR); and POSTECH ACADEMY-INDUSTRY FOUNDATION, Gyeonsangbuk-Do (KR)
Filed on Sep. 5, 2019, as Appl. No. 16/561,378.
Claims priority of application No. 10-2018-0157471 (KR), filed on Dec. 7, 2018.
Prior Publication US 2020/0184315 A1, Jun. 11, 2020
Int. Cl. G06N 20/00 (2019.01); G06N 3/02 (2006.01); G06N 3/045 (2023.01); G06N 3/08 (2023.01); G06N 3/063 (2023.01)
CPC G06N 3/045 (2023.01) [G06N 3/02 (2013.01); G06N 3/063 (2013.01); G06N 3/08 (2013.01); G06N 20/00 (2019.01)] 18 Claims
OG exemplary drawing
 
1. A method of implementing a neural network in a neuromorphic apparatus having a memory and processing circuitry, the method comprising:
dividing, by the processing circuitry, the neural network into a plurality of sub-networks by,
determining a number of axon circuits included in a core of the memory,
determining a number of input activations to the neural network, and
dividing the neural network into the plurality of sub-networks based on the number of axon circuits and the number of input activations such that a number of the input activations associated with each of the sub-networks is equal to the number of axon circuits;
initializing, by the processing circuitry, a hyper-parameter used in the sub-networks; and
training, by the processing circuitry, the sub-networks by using the hyper-parameter.