US 11,681,622 B2
Dynamic memory address encoding
Yubo Zhang, Los Gatos, CA (US); and Pingfan Meng, Dublin, CA (US)
Assigned to Pony AI Inc., Grand Cayman (KY)
Filed by Pony AI Inc., Grand Cayman (KY)
Filed on Dec. 14, 2021, as Appl. No. 17/551,107.
Application 17/551,107 is a continuation of application No. 16/709,192, filed on Dec. 10, 2019, granted, now 11,200,167.
Prior Publication US 2022/0107896 A1, Apr. 7, 2022
This patent is subject to a terminal disclaimer.
Int. Cl. G06F 12/0811 (2016.01); G06F 12/0846 (2016.01); G06F 12/1045 (2016.01); G06F 12/02 (2006.01)
CPC G06F 12/0811 (2013.01) [G06F 12/0292 (2013.01); G06F 12/0851 (2013.01); G06F 12/1045 (2013.01); G06F 2212/40 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A computer-implemented method for dynamic memory address encoding of coordinate data, the method comprising:
identifying one or more constraints associated with coordinate data;
determining, based on the one or more constraints, a particular interleaving scheme that applies a particular number of bit representations corresponding to addresses of a cache in respective coordinate axes;
determining an address encoding for the coordinate data corresponding to the interleaving scheme;
applying the address encoding to the coordinate data to obtain an encoded memory address; and
storing the coordinate data at a memory location corresponding to the encoded memory address.