| CPC G06F 8/65 (2013.01) [G06F 9/4411 (2013.01)] | 18 Claims |
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1. A mouse chip, comprising:
a flash memory, recorded with first firmware, and content of the flash memory being configured to operate a function called by the mouse chip to generate a function return value, wherein
the mouse chip is configured to
generate a function address of a function call,
perform address mapping on the function address to generate an operation address,
cache the function return value generated in the flash memory into a cache memory according to the operation address, and
hold mapping between cache addresses and flash addresses to accordingly cache the function return value at a corresponding flash address of the operation address and read the function return value in the cache memory via a first bus, or update the first firmware in the flash memory with update data via a second bus.
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