US 11,681,461 B2
Host inquiry response generation in a memory device
Nadav Grosz, Broomfield, CO (US); and David Aaron Palmer, Boise, ID (US)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on Nov. 22, 2021, as Appl. No. 17/532,020.
Application 17/532,020 is a continuation of application No. 16/235,168, filed on Dec. 28, 2018, granted, now 11,182,102.
Prior Publication US 2022/0083263 A1, Mar. 17, 2022
This patent is subject to a terminal disclaimer.
Int. Cl. G06F 3/06 (2006.01)
CPC G06F 3/0655 (2013.01) [G06F 3/0604 (2013.01); G06F 3/0679 (2013.01)] 22 Claims
OG exemplary drawing
 
1. A controller for a memory device, the controller comprising:
a first interface to communicate with a host;
a second interface to communicate with the memory device; and
processing circuitry to:
execute a first command received from a host via the first interface on the memory device via the second interface;
receive a status check, via the first interface, from the host for a second command, the status check received after execution of the first command has begun; and
provide, via the first interface, a response to the status check that includes both information about the second command and a status for the first command to initiate communication to the host regarding the first command without a host status check for the first command, wherein the response is:
a message provided to the host in accordance with a host-controller protocol, and wherein the status for the first command is included within the body of the message; or
held in a register of the first interface that the host reads in accordance with a host-controller protocol with the controller.