	US 11,678,285 B2
	Synchronization signal block design using a single carrier quadrature amplitude modulation waveform
Morteza Soltani, San Diego, CA (US); Jun Ma, San Diego, CA (US); Xiaoxia Zhang, San Diego, CA (US); Iyab Issam Sakhnini, San Diego, CA (US); Tao Luo, San Diego, CA (US); Juan Montojo, San Diego, CA (US); Peter Gaal, San Diego, CA (US); Raviteja Patchava, San Diego, CA (US); and Hemant Saggar, Irvine, CA (US)
Assigned to QUALCOMM Incorporated, San Diego, CA (US)
Filed by QUALCOMM Incorporated, San Diego, CA (US)
Filed on Jul. 28, 2021, as Appl. No. 17/443,879.
Prior Publication US 2023/0036387 A1, Feb. 2, 2023
Int. Cl. H04W 56/00 (2009.01); H04L 5/00 (2006.01)

CPC H04W 56/0015 (2013.01) [H04L 5/0051 (2013.01); H04W 56/003 (2013.01); H04W 56/0035 (2013.01)]

30 Claims

1. A user equipment (UE) for wireless communication, comprising:

a memory; and

one or more processors, coupled to the memory, configured to:

receive a synchronization signal block (SSB) transmitted using a single carrier quadrature amplitude modulation (SC-QAM) waveform, wherein:

the SSB has a uniform bandwidth allocation for each of a primary synchronization signal (PSS) included in the SSB, a secondary synchronization signal (SSS) included in the SSB, and physical broadcast channel (PBCH) data included in the SSB; and

the SSB includes one symbol that includes a first portion of the PBCH data, and one symbol that includes a PBCH demodulation reference signal (DMRS) and a second portion of the PBCH data; and

perform initial channel access based at least in part on the SSB.