US 11,677,472 B2
Hybrid integration of microLED interconnects with ICs
Robert Kalman, Mountain View, CA (US); Bardia Pezeshki, Mountain View, CA (US); Alexander Tselikov, Mountain View, CA (US); and Cameron Danesh, Mountain View, CA (US)
Assigned to AVICENATECH CORP., Sunnyvale, CA (US)
Filed by Robert Kalman, Mountain View, CA (US); Bardia Pezeshki, Mountain View, CA (US); Alexander Tselikov, Mountain View, CA (US); and Cameron Danesh, Mountain View, CA (US)
Filed on Aug. 30, 2021, as Appl. No. 17/461,586.
Claims priority of provisional application 63/072,018, filed on Aug. 28, 2020.
Prior Publication US 2022/0069914 A1, Mar. 3, 2022
Int. Cl. H04B 10/00 (2013.01); H04B 10/40 (2013.01); H05K 1/11 (2006.01); G02B 6/42 (2006.01); H04B 10/25 (2013.01)
CPC H04B 10/40 (2013.01) [G02B 6/4246 (2013.01); H04B 10/25 (2013.01); H05K 1/111 (2013.01); H05K 1/115 (2013.01); H05K 2201/10121 (2013.01)] 11 Claims
OG exemplary drawing
 
1. A device including optical communication components, comprising:
a processor integrated circuit;
an optical transceiver subsystem with elements in or attached to an optical transceiver integrated circuit, the optical transceiver integrated circuit electrically coupled to the processor integrated circuit, the optical transceiver subsystem including a plurality of transmitters and receivers;
with each of the transmitters including transmitter circuitry in the optical transceiver integrated circuit and a microLED, bonded to a top surface of the optical transceiver integrated circuit, electrically connected to the transmitter circuitry;
with each of the receivers including receiver circuitry in the optical transceiver integrated circuit and a photodetector, in or bonded to the top surface of the optical transceiver integrated circuit, electrically connected to the receiver circuitry; and
the optical transceiver integrated circuit including vias coupling the transmitter circuitry and the receiver circuitry to pads on a bottom surface of the optical transceiver integrated circuit, the optical transceiver integrated circuit being coupled to the processor integrated circuit at least in part by the pads.