CPC G11C 16/10 (2013.01) [G11C 7/12 (2013.01); G11C 7/227 (2013.01); G11C 16/3459 (2013.01); G11C 2207/002 (2013.01); G11C 2216/20 (2013.01)] | 20 Claims |
1. A memory system, comprising:
a memory cell array; and
a controller coupled to the memory cell array and configured to:
control applying a first program voltage to a word line to program memory cells in the memory cell array, the memory cells being coupled to the word line; and
in response to receiving a suspend command, control applying a positive bias discharge voltage to the word line when the first program voltage ramps down.
|