US 11,675,956 B2
Pruning redundant buffering solutions using fast timing models
Jhih-Rong Gao, Austin, TX (US); Yi-Xiao Ding, Austin, TX (US); and Zhuo Li, Austin, TX (US)
Assigned to Cadence Design Systems, Inc., San Jose, CA (US)
Filed by Cadence Design Systems, Inc., San Jose, CA (US)
Filed on Mar. 31, 2021, as Appl. No. 17/219,748.
Prior Publication US 2022/0318480 A1, Oct. 6, 2022
Int. Cl. G06F 30/30 (2020.01); G06F 30/398 (2020.01); G06F 30/392 (2020.01); G06F 111/04 (2020.01); G06F 117/10 (2020.01); G06F 119/12 (2020.01)
CPC G06F 30/398 (2020.01) [G06F 30/392 (2020.01); G06F 2111/04 (2020.01); G06F 2117/10 (2020.01); G06F 2119/12 (2020.01)] 12 Claims
OG exemplary drawing
 
1. A system comprising:
one or more processors of a machine; and
at least one computer storage medium storing instructions, which, when executed by the machine, cause the machine to perform operations comprising:
accessing a circuit design stored in memory, the circuit design comprising a buffer tree having a baseline timing characteristic;
identifying a set of candidate solutions for improving the baseline timing characteristic using an initial timing model;
selecting, based on the initial timing model, a subset of candidate solutions from the set of candidate solutions that have a timing characteristic lower than the baseline timing characteristic;
evaluating the subset of candidate solutions using a secondary timing model;
based on determining that at least one candidate solution in the subset of candidate solutions has a timing characteristic that is better than the baseline timing characteristic of the buffer tree, evaluating a remainder of candidate solutions from the set of candidate solutions using the secondary timing model;
selecting, a faster candidate solution after evaluating the set of candidate solutions using the secondary timing model; and
replacing a portion of the buffer tree with the faster candidate solution.