US 11,675,630 B2
Methods and apparatus to configure heterogenous components in an accelerator
Michael Behar, Zichron Yaakov (IL); Moshe Maor, Kiryat Mozking (IL); Ronen Gabbai, Ramat Hashofet (IL); Roni Rosner, Binyamina (IL); Zigi Walter, Haifa (IL); and Oren Agam, Zichron Yaacov (IL)
Assigned to INTEL CORPORATION, Santa Clara, CA (US)
Filed by Intel Corporation, Santa Clara, CA (US)
Filed on Aug. 15, 2019, as Appl. No. 16/541,979.
Prior Publication US 2019/0370084 A1, Dec. 5, 2019
Int. Cl. G06F 9/50 (2006.01); G06F 16/901 (2019.01); G06N 3/044 (2023.01); G06N 3/045 (2023.01)
CPC G06F 9/5083 (2013.01) [G06F 16/9024 (2019.01); G06N 3/044 (2023.01); G06N 3/045 (2023.01)] 25 Claims
OG exemplary drawing
 
1. An apparatus to configure heterogenous components in an accelerator, the apparatus comprising:
a graph compiler to:
identify a workload node in a workload; and
generate a selector for the workload node; and
the selector to:
identify an input condition of a compute building block, the input condition to describe a number of inputs accepted by a kernel executing on the compute building block; and
identify an output condition of the compute building block, the output condition to describe one or more of: (a) a number of outputs generated by the kernel, and (b) types of data structures generated by the kernel, wherein the graph compiler is to, in response to obtaining the identified input condition and output condition from the selector, map the workload node to the compute building block.