US 11,675,409 B2
Power sense correction for power budget estimator
Matthias Knoth, Scotts Valley, CA (US); Srikanth Balasubramanian, Los Altos, CA (US); Venkatram Krishnaswamy, Los Altos, CA (US); and Ramesh B. Gunna, San Jose, CA (US)
Assigned to Apple Inc., Cupertino, CA (US)
Filed by Apple Inc., Cupertino, CA (US)
Filed on Jul. 12, 2022, as Appl. No. 17/812,086.
Application 17/812,086 is a continuation of application No. 17/026,121, filed on Sep. 18, 2020, granted, now 11,416,056.
Prior Publication US 2022/0342471 A1, Oct. 27, 2022
Int. Cl. G06F 1/28 (2006.01); G06Q 50/06 (2012.01); G06F 1/3228 (2019.01)
CPC G06F 1/28 (2013.01) [G06F 1/3228 (2013.01); G06Q 50/06 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An apparatus comprising:
an execute circuit, coupled to a power node, configured to execute a plurality of operations;
a power sensing circuit configured to:
generate a signal transition using a received clock signal;
monitor a propagation of the signal transition through one or more logic gates in the power sensing circuit; and
determine, based on the propagation, a power value corresponding to a voltage level of the power node; and
a power control circuit configured to adjust a number of power credits in a power credit pool based on the power value.