CPC G06F 1/266 (2013.01) [G06F 1/3228 (2013.01); H05K 1/0218 (2013.01)] | 16 Claims |
1. A computing device, comprising:
a hash board, comprising a series power supply circuit disposed thereon, which includes m layers of to-be-powered chips that are connected in series between a power supply positive electrode of the hash board and a power supply negative electrode of the hash board, where m is an integer greater than 2, wherein highest-layer to-be-powered chips among the m layers of to-be-powered chips are connected to the power supply positive electrode of the hash board, and bottommost-layer to-be-powered chips among the m layers of to-be-powered chips are connected to the power supply negative electrode of the hash board, wherein the power supply positive electrode of the hash board is configured to receive a higher potential relative to the power supply negative electrode of the hash board; and
a control board, configured to provide, to the hash board, control signals and communication signals that are accessed to the series power supply circuit through a communication interface of the highest-layer to-be-powered chips in the series power supply circuit and communicated to lower layers through the m layers of to-be-powered chips that are connected in series,
wherein in the case that the series power supply circuit on the hash board is configured to comprise m-n layers of to-be-powered chips, the bottommost n layers of to-be-powered chips are replaced with conductor patches.
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