CPC G06F 1/12 (2013.01) [G06F 1/10 (2013.01)] | 18 Claims |
1. A clock recovery method comprising:
receiving, by a first dynamic phase interpolator (PI), a plurality of reference clock signals including:
a first reference clock signal,
a second reference clock signal having a +90° phase shift with the first reference clock signal,
a third reference clock signal having a +90° phase shift with the second reference clock signal, and
a fourth reference clock signal having a +90° phase shift with the third reference clock signal;
generating, by the first dynamic PI, a first center clock signal, generating of the first center clock comprising:
receiving, by the first dynamic PI, a first phase code for weighting the first, second, third and fourth reference clock signals to adjust a phase of the first center clock signal;
generating, by a second dynamic PI, a second center clock signal; and
outputting, by a static PI, an edge clock signal based on the first and second center clock signals.
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