CPC H04N 21/266 (2013.01) [H03M 13/29 (2013.01); H03M 13/2906 (2013.01); H03M 13/2909 (2013.01); H03M 13/2957 (2013.01); H03M 13/6583 (2013.01); H04L 65/611 (2022.05); H04L 65/70 (2022.05); H04L 65/764 (2022.05); H04L 69/18 (2013.01); H04N 21/2381 (2013.01); H04N 21/23605 (2013.01); H04N 21/4381 (2013.01); H04N 21/6112 (2013.01); H04N 21/6131 (2013.01); H03M 13/1102 (2013.01); H03M 13/2732 (2013.01); H03M 13/2936 (2013.01)] | 20 Claims |
16. An apparatus, comprising:
one or more processors; and
one or more memories having program instructions stored thereon that are executable by the one or more processors to:
wirelessly receive first and second frames that each include respective: first control information, second control information, and one or more packets, wherein the first control information indicates configuration of the apparatus to decode a wirelessly received data stream that includes the packets and wherein the first control information is generated according to different protocol version parameters and has a different physical layer structure for the first and second frames and wherein the second control information specifies:
a physical layer parameter of the corresponding first control information that indicates the physical layer structure of the first control information; and
the protocol version parameter for the corresponding first control information;
determine a physical layer structure of the respective first control information based on the respective second control information;
decode the respective first control information based on the determined physical layer structure; and
decode the packets of the respective first and second frames based on the decoded respective first control information.
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