CPC H04L 63/0807 (2013.01) [G06F 21/6245 (2013.01); H04L 63/0407 (2013.01); H04W 4/12 (2013.01)] | 30 Claims |
1. An apparatus comprising:
one or more processors; and
memory storing processor-executable instructions that, when executed by the one or more processors, cause the apparatus to:
receive, via a user device, based on a failed attempt to access a resource, a valid refresh token;
send, to the user device, based on the valid refresh token, an invalid access token;
receive, via the user device, based on a failed attempt to access the resource with the invalid access token, the valid refresh token; and
send, to the user device, based on the valid refresh token, and based on a verification associated with the user device, a valid access token.
|