CPC H04L 7/04 (2013.01) [H04L 7/0037 (2013.01)] | 16 Claims |
1. A method comprising:
generating a SYNC output signal, the SYNC output signal indicative of indicating when to update a time of day counter;
feeding back the SYNC output signal to an input terminal as a SYNC feedback signal;
determining a time difference between a SYNC input signal and the SYNC feedback signal;
adjusting a timing of the SYNC output signal based on the time difference;
generating a local system clock signal in a phase-locked loop;
generating the SYNC output signal by dividing the local system clock signal;
adjusting a divide value of a divider to adjust the timing of the SYNC output signal based on the time difference; and
determining a residue of the time difference according to a remaining time difference not accounted for by adjusting the divide value.
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