CPC H04B 7/0456 (2013.01) [H04L 1/005 (2013.01); H04L 1/0643 (2013.01); H04L 25/0222 (2013.01); H04L 25/03942 (2013.01); H04L 25/067 (2013.01); H04L 27/2604 (2013.01); H04L 5/0023 (2013.01); H04L 5/0048 (2013.01); H04L 25/0204 (2013.01); H04L 25/0242 (2013.01)] | 6 Claims |
1. An integrated circuit comprising:
circuitry, which, in operation, controls
performing a precoding process on first modulated symbols s1(t) and second modulated symbols s2(t) to generate first precoded symbols z1(t) and second precoded symbols z2(t), t being an integer starting from 0 and incrementing in steps of 1; and
transmitting the first precoded symbols z1(t) and the second precoded symbols z2(t) from different antennas;
wherein the precoding process is expressed by the following Equation 1:
θ changes in turn according to t within a period N, θ is a value expressed in radians, and Iz1(t), Iz2(t), Is1(t), Is2(t) are in-phase component of z1(t), z2(t), s1(t), s2(t), respectively, and Qz1(t), Qz2(t), Qs1(t), Qs2(t) are quadrature component of z1(t), z2(t), s1(t), s2(t), respectively.
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