US 11,671,111 B2
Hardware channel-parallel data compression/decompression
Ilia Ovsiannikov, Porter Ranch, CA (US); Ali Shafiee Ardestani, San Jose, CA (US); Lei Wang, Burlingame, CA (US); and Joseph H. Hassoun, Los Gatos, CA (US)
Assigned to SAMSUNG ELECTRONICS CO., LTD.
Filed by Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed on Apr. 7, 2020, as Appl. No. 16/842,662.
Claims priority of provisional application 62/841,819, filed on May 1, 2019.
Claims priority of provisional application 62/835,496, filed on Apr. 17, 2019.
Prior Publication US 2020/0336272 A1, Oct. 22, 2020
Int. Cl. H04L 5/02 (2006.01); G06F 9/38 (2018.01); G06F 9/30 (2018.01); H03M 7/30 (2006.01); H03M 7/40 (2006.01)
CPC H03M 7/3066 (2013.01) [G06F 9/30018 (2013.01); G06F 9/30036 (2013.01); G06F 9/30145 (2013.01); G06F 9/3818 (2013.01); G06F 9/3851 (2013.01); H03M 7/40 (2013.01); H03M 7/6005 (2013.01); H03M 7/6011 (2013.01); H03M 7/6023 (2013.01); H04L 5/023 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A multichannel data packer, comprising:
a plurality of two-input multiplexers arranged in 2N rows and N columns in which N is an integer greater than 1, each input of a multiplexer in a first column receiving a respective bit stream of 2N channels of bit streams, each respective bit stream comprising a bit-stream length based on data in the bit stream, and the multiplexers in a last column outputting 2N channels of packed bit streams each having a same bit-stream length; and
a controller that controls the plurality of multiplexers so that the multiplexers in the last column output the 2N channels of bit streams that each have the same bit-stream length.