US 11,671,103 B2
Integration of analog circuits inside digital blocks
Ramy A. Ahmed, Cupertino, CA (US); Bruno W. Garlepp, Sunnyvale, CA (US); and Jafar Savoj, Sunnyvale, CA (US)
Assigned to Apple Inc., Cupertino, CA (US)
Filed by Apple Inc., Cupertino, CA (US)
Filed on Jan. 7, 2022, as Appl. No. 17/571,228.
Application 17/571,228 is a continuation of application No. 16/796,405, filed on Feb. 20, 2020, granted, now 11,258,447.
Prior Publication US 2022/0216874 A1, Jul. 7, 2022
This patent is subject to a terminal disclaimer.
Int. Cl. H03K 21/00 (2006.01); H03K 21/40 (2006.01); H03K 3/03 (2006.01); H03K 19/0175 (2006.01); H03K 21/08 (2006.01)
CPC H03K 21/403 (2013.01) [H03K 3/0315 (2013.01); H03K 19/017509 (2013.01); H03K 21/08 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A circuit, comprising:
a first digital power supply that provides a first supply voltage to first digital functional circuitry during use, wherein the first supply voltage is determined based on one or more properties of the first digital functional circuitry;
a second digital power supply, wherein the second digital power supply provides a second supply voltage to second digital functional circuitry, the second supply voltage having a magnitude that remains above a minimum voltage magnitude during use;
a first circuit configured to assess one or more local operating properties, wherein the first circuit includes:
a first sensor circuit coupled to the second digital power supply, wherein the first sensor circuit is configured to provide an output signal responsive to a value of a first local operating property of the first digital functional circuitry;
a first level shifter coupled to the first sensor circuit, the first level shifter being configured to receive the output signal from the first sensor circuit and provide a first shifted output signal corresponding to the first supply voltage; and
a first counter coupled to the first level shifter, wherein the first counter is configured to receive the first shifted output signal and capture a first value representing the first shifted output signal.