US 11,670,614 B2
Integrated circuit assembly with hybrid bonding
Jonghae Kim, San Diego, CA (US); Milind Shah, San Diego, CA (US); Periannan Chidambaram, San Diego, CA (US); and Abdolreza Langari, San Diego, CA (US)
Assigned to QUALCOMM INCORPORATED, San Diego, CA (US)
Filed by QUALCOMM Incorporated, San Diego, CA (US)
Filed on Oct. 2, 2020, as Appl. No. 17/61,737.
Prior Publication US 2022/0108968 A1, Apr. 7, 2022
Int. Cl. H01L 23/31 (2006.01); H01L 23/48 (2006.01); H01L 23/00 (2006.01); H01L 21/56 (2006.01)
CPC H01L 24/29 (2013.01) [H01L 21/565 (2013.01); H01L 23/3157 (2013.01); H01L 23/481 (2013.01); H01L 24/27 (2013.01); H01L 2924/01014 (2013.01); H01L 2924/1205 (2013.01); H01L 2924/14 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An integrated circuit assembly, comprising:
a first reconstituted assembly comprising at least one passive component and a first bonding layer, wherein the at least one passive component comprises at least one of a capacitor, a varactor, an inductor, or a resistor;
a second reconstituted assembly disposed above the first reconstituted assembly and comprising one or more first semiconductor dies, a second bonding layer bonded to the first bonding layer of the first reconstituted assembly, and a third bonding layer; and
a third reconstituted assembly disposed above the second reconstituted assembly and comprising one or more second semiconductor dies and a fourth bonding layer bonded to the third bonding layer of the second reconstituted assembly.