CPC G11C 16/26 (2013.01) [G11C 16/04 (2013.01); G11C 16/0483 (2013.01); G11C 16/28 (2013.01); G11C 16/349 (2013.01); G11C 29/021 (2013.01); G11C 29/028 (2013.01); G11C 16/08 (2013.01); G11C 16/24 (2013.01); G11C 2207/2254 (2013.01)] | 24 Claims |
1. A memory device, comprising:
a memory array comprising a group of multiple blocks of memory cells; and
a controller operably coupled to the memory array, the controller configured to perform operations comprising:
identifying, based at least in part on read operations to a block of the group, a condition to trigger a read level calibration; and
performing, in response to the identified condition, the read level calibration, the read level calibration comprising a sampling operation that evaluates a threshold voltage level of the group.
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