CPC G09G 3/3266 (2013.01) [G09G 3/3233 (2013.01); G09G 2310/0213 (2013.01); G09G 2310/0286 (2013.01); G09G 2310/08 (2013.01); G09G 2320/0233 (2013.01)] | 29 Claims |
1. A gate driver comprising:
a first shift register connected to gate lines and sensing control lines, and configured to supply a gate signal and a sensing signal to the gate lines and the sensing control lines in response to a first start pulse;
a second shift register connected to the gate lines and the sensing control lines, and configured to supply the gate signal and the sensing signal to the gate lines and the sensing control lines in response to a second start pulse;
first switches connected between the first shift register and the gate lines, and between the first shift register and the sensing control lines; and
second switches connected between the second shift register and the gate lines, and between the second shift register and the sensing control lines,
wherein:
the gate lines are connected to first transistors, and the sensing control lines are connected to second transistors;
the first switches are configured to be turned on during display periods, and the second switches are configured to be turned on during sensing periods between the display periods; and
the second shift register is configured to supply the second start pulse at different times in sequential frames.
|