US 11,670,229 B2
Pixel structure and control method thereof, driver circuit, array substrate and display apparatus
Wenjing Tan, Beijing (CN); Kuo Sun, Beijing (CN); and Yu Feng, Beijing (CN)
Assigned to BOE TECHNOLOGY GROUP CO., LTD., Beijing (CN)
Filed by BOE TECHNOLOGY GROUP CO., LTD., Beijing (CN)
Filed on May 27, 2022, as Appl. No. 17/826,437.
Application 17/826,437 is a continuation of application No. 17/271,680, granted, now 11,367,388, previously published as PCT/CN2020/090872, filed on May 18, 2020.
Claims priority of application No. 201910425563.8 (CN), filed on May 21, 2019.
Prior Publication US 2022/0284854 A1, Sep. 8, 2022
Int. Cl. G09G 3/3225 (2016.01); G09G 3/20 (2006.01)
CPC G09G 3/3225 (2013.01) [G09G 3/2003 (2013.01); G09G 2300/0452 (2013.01); G09G 2310/0286 (2013.01); G09G 2320/0242 (2013.01)] 13 Claims
OG exemplary drawing
 
1. An array substrate, comprising:
a base;
a pixel structure disposed on the base, the pixel structure having a first region and a second region; the pixel structure including:
a plurality of first pixel units disposed in the first region;
at least one second pixel unit disposed in the second region; wherein
a distribution density of the plurality of first pixel units in the first region is greater than a distribution density of the at least one second pixel unit disposed in the second region;
each first pixel unit includes at least one first color sub-pixel, at least one second color sub-pixel, and at least two third color sub-pixels, and each second pixel unit includes at least one first color sub-pixel, at least one second color sub-pixel, and at least two third color sub-pixels;
in the second region, the at least one first color sub-pixel and the at least one second color sub-pixel are located in a same row, the at least two third color sub-pixels are located in a same column, and a straight line where geometrical centers of the at least two third color sub-pixels are located intersects with a straight line where geometrical centers of the at least one first color sub-pixel and the at least one second color sub-pixel in the same row are located; and
a driver circuit disposed on the base for driving the pixel structure, the driver circuit including a plurality of cascaded shift register circuits that include a plurality of first shift register circuits and at least one second shift register circuit, wherein each first pixel unit in the pixel structure is coupled with at least one first shift register circuit, and at least one second pixel unit in the pixel structure is coupled with the at least one second shift register circuit; wherein
in a same second pixel unit, the at least two third color sub-pixels are coupled with a same second shift register circuit.