US 11,670,209 B2
Display device performing clock gating
Hyo-Chul Lee, Yongin-si (KR); and Min Joo Lee, Yongin-si (KR)
Assigned to SAMSUNG DISPLAY CO., LTD., Yongin-si (KR)
Filed by SAMSUNG DISPLAY CO., LTD., Yongin-si (KR)
Filed on Mar. 29, 2022, as Appl. No. 17/656,913.
Claims priority of application No. 10-2021-0098125 (KR), filed on Jul. 26, 2021.
Prior Publication US 2023/0023898 A1, Jan. 26, 2023
Int. Cl. G09G 3/20 (2006.01)
CPC G09G 3/20 (2013.01) [G09G 2310/027 (2013.01); G09G 2310/061 (2013.01); G09G 2310/08 (2013.01); G09G 2330/021 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A display device comprising:
a display panel including a plurality of pixels;
a controller configured to output image data and a gated clock signal, the image data including a plurality of pixel data for the plurality of pixels; and
a data driver configured to receive the image data and the gated clock signal from the controller, and to sample the image data in response to the gated clock signal,
wherein the controller is further configured to:
detect a repeated data pattern where same pixel data is repeated in the image data;
generate a clock enable signal, wherein the clock enable signal is generated with an off level during a power saving period in which the repeated data pattern is transferred; and
gate an input clock signal in response to the clock enable signal to produce the gated clock signal.