CPC G06F 30/367 (2020.01) [G06F 30/33 (2020.01); G06F 30/3323 (2020.01)] | 11 Claims |
1. A method comprising:
processing an executable specification file using a processor executing a software program to generate a formal properties file;
modeling an analog circuit component of a mixed-signal circuit design as a digital circuit component in a model file;
modeling at least one analog circuit block of the mixed-signal circuit design as one or more ports in the model file; and
verifying correspondence of connections and integration of the formal properties file and the model file with the mixed-signal circuit design using a processor executing an electronic design automation (EDA) tool to generate a coverage report file;
wherein at least one of a plurality of integration abstractions in the executable specification file is of one of a plurality of construct types comprising:
a first construct for representing assignment of internal direct connections of the mixed-signal circuit design;
a second construct indicating at least one logic expression for representing conditional logic expressions in control logic of the mixed-signal circuit design;
a third construct for representing unconnected external ports of the mixed-signal circuit design; or
a fourth construct for representing switched internal connections of the mixed-signal circuit design.
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