US 11,669,491 B2
Processor, system on chip including heterogeneous core, and operating methods thereof for optimizing hot functions for execution on each core of a heterogeneous processor
Junmo Park, Hwaseong-si (KR); and Dongsuk Jeon, Seoul (KR)
Assigned to Samsung Electronics Co., Ltd., Gyeonggi-do (KR)
Filed by Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed on Apr. 7, 2021, as Appl. No. 17/224,628.
Claims priority of application No. 10-2020-0043608 (KR), filed on Apr. 9, 2020; and application No. 10-2020-0163052 (KR), filed on Nov. 27, 2020.
Prior Publication US 2021/0318984 A1, Oct. 14, 2021
Int. Cl. G06F 15/78 (2006.01); G06F 15/82 (2006.01)
CPC G06F 15/82 (2013.01) [G06F 15/7807 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An operation method of a processor comprising a plurality of heterogeneous cores, the operation method comprising:
loading, from a memory, first data corresponding to core information of an execution core of the plurality of heterogenous cores during runtime of the execution core, wherein the first data is included in compile data of an application, the compile data including a first function compiled for each heterogeneous core of the plurality of heterogeneous cores, the first function being a function from among a plurality of functions of the application that is at least one of frequently called; and
processing, by the execution core, execution codes for executing the application, based on the first data.