| CPC G06F 12/0806 (2013.01) [G06F 12/0223 (2013.01); G06F 2212/62 (2013.01)] | 17 Claims |
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1. A method, comprising:
receiving, from a processing device, a set feature command that enables a configuration associated with performance of a multi-plane read operation on a memory component, wherein the configuration defines a range of column addresses corresponding to a size of data transferred from each plane of the multi-plane read operation to a respective cache register of the memory component, wherein the range has a first marginal value and a second marginal value greater than the first marginal value;
responsive to receiving an access request from the processing device to perform a multi-plane read operation on the memory component:
transferring data out of a first buffer coupled to a first plane of a plurality of planes of a memory component, wherein the data was previously transferred from the first plane to the first buffer responsive to an access request to sense data stored in the plurality of planes of the memory component;
updating a column address counter sequentially from the first marginal value to the second marginal value in response to a portion of the data corresponding to a column address of the first plane being transferred out of a cache register coupled to the first plane; and
transferring, in response to the updated column address counter indicating the second marginal value and independently of the access request received from the processing device, data out of a second buffer coupled to a second plane of the plurality of planes of the memory component, wherein the data transferred out of the second buffer was previously transferred from the second plane to the second buffer responsive to the access request to sense the data.
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