CPC G06F 9/3851 (2013.01) [G06F 9/3802 (2013.01)] | 15 Claims |
1. An apparatus, comprising:
a first scheduling pool associated with a first minimum scheduling latency;
a second scheduling pool associated with a second minimum scheduling latency, the second minimum scheduling latency greater than the first minimum scheduling latency;
a common instruction picker coupled to both the first scheduling pool and the second scheduling pool; and
a dispatch block coupled to the common instruction picker and configured to:
receive an instruction from the common instruction picker and provide the instruction to an execution pipeline; and
provide wakeup information to the first scheduling pool and the second scheduling pool, wherein the wakeup information comprises dispatch/completion status information.
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