US 11,669,330 B2
Method for performing random read access to a block of data using parallel LUT read instruction in vector processors
Jayasree Sankaranarayanan, Kerala (IN); and Dipan Kumar Mandal, Bangalore (IN)
Assigned to Texas Instruments Incorporated, Dallas, TX (US)
Filed by TEXAS INSTRUMENTS INCORPORATED, Dallas, TX (US)
Filed on May 3, 2021, as Appl. No. 17/306,350.
Application 17/306,350 is a continuation of application No. 16/451,330, filed on Jun. 25, 2019, granted, now 10,996,955.
Application 16/451,330 is a continuation of application No. 15/991,653, filed on May 29, 2018, granted, now 10,331,347, issued on Jun. 25, 2019.
Application 15/991,653 is a continuation of application No. 14/920,365, filed on Oct. 22, 2015, abandoned.
Claims priority of application No. IN5509/CHE/2014 (IN), filed on Nov. 3, 2014.
Prior Publication US 2021/0255869 A1, Aug. 19, 2021
Int. Cl. G06F 9/38 (2018.01); G06F 9/30 (2018.01)
CPC G06F 9/383 (2013.01) [G06F 9/3004 (2013.01); G06F 9/30036 (2013.01); G06F 9/30043 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method comprising:
identifying a set of data accesses of a data set in a first memory;
based on the set of data accesses, copying the data set from the first memory to a second memory such that a plurality of tables is created in the second memory, each containing a respective copy of the data set; and
performing the set of data accesses by performing a look up table instruction on the second memory that includes an access of a respective data element from each of the plurality of tables performed in parallel;
storing the respective data elements from each of the plurality of tables in a destination register to form a first vector; and
providing the first vector to a processor.