CPC G06F 3/0655 (2013.01) [G06F 3/0604 (2013.01); G06F 3/0611 (2013.01); G06F 3/0679 (2013.01); G06F 12/0246 (2013.01); G06F 2212/7201 (2013.01)] | 18 Claims |
1. A memory system that is connectable to a host,
a non-volatile memory; and
a controller configured to be electrically connected to the non-volatile memory to control the non-volatile memory,
wherein the non-volatile memory is configured to store
an address translation table for managing a correspondence between a logical address used by the host to access the memory system and a physical address in which data in the non-volatile memory is written, and
a data map for managing whether the data written in the non-volatile memory is valid or invalid,
in a case where an invalidation command for invalidating the data written in the non-volatile memory is received from the host, the controller is configured to update the address translation table and the data map based on the invalidation command,
a response to the invalidation command is transmitted to the host after the address translation table is updated and before the data map is updated,
the controller is configured to store an invalidation request based on the invalidation command in a queue, retrieve the invalidation request from the queue after the response to the invalidation command is transmitted to the host, and update the data map based on the invalidation request,
the address translation table comprises a plurality of fragment tables,
a range of logical address is allocated to each of the fragment tables,
the invalidation command comprises a logical address for accessing data to be invalidated by the invalidation command,
the controller is configured to update the fragment table specified based on the logical address in the invalidation command among the fragment tables, and
the invalidation request comprises a fragment table before being updated.
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