US 11,659,772 B2
Semiconductor structure and method for forming the same
Hui-Lin Wang, Taipei (TW); Chia-Chang Hsu, Kaohsiung (TW); and Rai-Min Huang, Taipei (TW)
Assigned to UNITED MICROELECTRONICS CORP., Hsin-Chu (TW)
Filed by UNITED MICROELECTRONICS CORP., Hsin-Chu (TW)
Filed on Mar. 28, 2022, as Appl. No. 17/705,404.
Application 17/705,404 is a division of application No. 17/152,703, filed on Jan. 19, 2021, granted, now 11,322,682.
Application 17/152,703 is a continuation in part of application No. 16/541,172, filed on Aug. 15, 2019, granted, now 10,937,946, issued on Mar. 2, 2021.
Claims priority of application No. 201910623683.9 (CN), filed on Jul. 11, 2019.
Prior Publication US 2022/0216397 A1, Jul. 7, 2022
Int. Cl. H10N 50/01 (2023.01); H01L 23/544 (2006.01); H10B 61/00 (2023.01); H10N 50/80 (2023.01)
CPC H10N 50/01 (2023.02) [H01L 23/544 (2013.01); H10B 61/00 (2023.02); H10N 50/80 (2023.02); H01L 2223/54426 (2013.01)] 10 Claims
OG exemplary drawing
 
1. A method for forming a semiconductor structure, comprising:
providing a substrate having a device region and an alignment mark region;
forming a first dielectric layer on the substrate and a second dielectric layer on the first dielectric layer;
forming a conductive via in the second dielectric layer on the device region;
forming a mask layer on the second dielectric layer, the mask layer having an opening exposing the second dielectric layer on the alignment mark region;
performing a dry etching process through the opening to form a first trench and a plurality of second trenches directly under the first trench, wherein the first trench penetrates through the second dielectric layer and an upper portion of the first dielectric layer, the second trenches are completely in the first dielectric layer and exposed from a bottom surface of the first trench;
removing the mask layer; and
forming a memory stack structure on the second dielectric layer, wherein the memory stack structure completely covers a top surface of the conductive via and filling into the first trench and the second trenches.