US 11,658,669 B2
Magnetoresistive asymmetry compensation
Jason Bellorado, San Jose, CA (US); Marcus Marrow, San Jose, CA (US); and Zheng Wu, Los Altos, CA (US)
Assigned to Seagate Technology LLC, Fremont, CA (US)
Filed by Seagate Technology LLC, Fremont, CA (US)
Filed on Jan. 24, 2022, as Appl. No. 17/582,376.
Application 17/582,376 is a continuation of application No. 17/162,411, filed on Jan. 29, 2021, granted, now 11,265,000.
Prior Publication US 2022/0247418 A1, Aug. 4, 2022
This patent is subject to a terminal disclaimer.
Int. Cl. G11B 20/10 (2006.01); G11B 5/00 (2006.01); H03M 1/06 (2006.01); H03G 3/30 (2006.01); G11B 5/027 (2006.01); G11B 5/012 (2006.01)
CPC H03M 1/06 (2013.01) [G11B 5/012 (2013.01); G11B 5/027 (2013.01); G11B 20/10324 (2013.01); H03G 3/30 (2013.01); H03G 2201/103 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An apparatus comprising:
a digital magnetoresistive asymmetry (MRA) compensation circuit configured to:
receive, from an analog-to-digital converter (ADC), a digital sample sequence corresponding to an analog signal;
perform digital MRA compensation on the digital sample sequence;
output an MRA-compensated sample sequence; and
a digital backend (DBE) configured to produce a bit sequence corresponding to the analog signal based on the MRA-compensated sample sequence.