US 11,658,116 B2
Interconnects on multiple sides of a semiconductor structure
Junli Wang, Slingerlands, NY (US); Albert Chu, Nashua, NH (US); Dechao Guo, Niskayuna, NY (US); and Brent Anderson, Jericho, VT (US)
Assigned to International Business Machines Corporation, Armonk, NY (US)
Filed by International Business Machines Corporation, Armonk, NY (US)
Filed on Mar. 2, 2021, as Appl. No. 17/189,528.
Prior Publication US 2022/0285259 A1, Sep. 8, 2022
Int. Cl. H01L 21/00 (2006.01); H01L 23/528 (2006.01); H01L 27/092 (2006.01); H01L 21/8238 (2006.01); H01L 23/522 (2006.01); H01L 21/768 (2006.01); H01L 23/48 (2006.01)
CPC H01L 23/528 (2013.01) [H01L 21/76898 (2013.01); H01L 21/823871 (2013.01); H01L 23/481 (2013.01); H01L 23/5226 (2013.01); H01L 27/092 (2013.01)] 8 Claims
OG exemplary drawing
 
1. A semiconductor structure comprising:
a front-end-of-line region comprising two or more devices;
a first back-end-of-line region on a first side of the front-end-of-line region, the first back-end-of-line region comprising a first set of interconnects for at least a first subset of the two or more devices in the front-end-of-line region;
a second back-end-of-line region on a second side of the front-end-of-line region opposite the first side of the front-end-of-line region, the second back-end-of-line region comprising a second set of interconnects for at least a second subset of the two or more devices in the front-end-of-line region; and
one or more passthrough vias disposed in the front-end-of-line region, each of the one or more passthrough vias connecting at least one of the first set of interconnects of the first back-end-of-line region to at least one of the second set of interconnects of the second back-end-of-line region.