US 11,658,022 B2
Method, control system, and system for machining a semiconductor wafer, and semiconductor wafer
Axel Beyer, Burghausen (DE); Christof Weber, Burghausen (DE); and Stefan Welsch, Polling (DE)
Assigned to SILTRONIC AG, Munich (DE)
Appl. No. 16/625,133
Filed by SILTRONIC AG, Munich (DE)
PCT Filed Jun. 4, 2018, PCT No. PCT/EP2018/064551
§ 371(c)(1), (2) Date Dec. 20, 2019,
PCT Pub. No. WO2018/234018, PCT Pub. Date Dec. 27, 2018.
Claims priority of application No. 102017210450.3 (DE), filed on Jun. 21, 2017.
Prior Publication US 2021/0358737 A1, Nov. 18, 2021
Int. Cl. H01L 21/02 (2006.01)
CPC H01L 21/02016 (2013.01) [H01L 21/02019 (2013.01)] 17 Claims
OG exemplary drawing
 
1. A method of treating a semiconductor wafer comprising monocrystalline silicon, having two sides and an edge, comprising:
disposing the semiconductor wafer on a susceptor in a coating apparatus and then processing the semiconductor wafer in said coating apparatus by passing an etching gas comprising hydrogen chloride or a mixture of hydrogen chloride and hydrogen into the coating apparatus in an etching step during said processing, and coating only one side of the two sides of the semiconductor wafer with a protective layer, either before said processing of a first side of the semiconductor wafer which has been subjected to a polishing operation by chemical mechanical polishing or before processing a second side of the semiconductor wafer opposite the first side.