US 11,657,011 B2
Avalon-to-Axi4 bus conversion method
Lei Guo, Jiangsu (CN); Jingdong Zhang, Jiangsu (CN); and Jiangwei Wang, Jiangsu (CN)
Assigned to INSPUR SUZHOU INTELLIGENT TECHNOLOGY CO., LTD., Jiangsu (CN)
Appl. No. 17/780,190
Filed by INSPUR SUZHOU INTELLIGENT TECHNOLOGY CO., LTD., Jiangsu (CN)
PCT Filed Dec. 9, 2020, PCT No. PCT/CN2020/134718
§ 371(c)(1), (2) Date May 26, 2022,
PCT Pub. No. WO2021/169474, PCT Pub. Date Sep. 2, 2021.
Claims priority of application No. 202010132403.7 (CN), filed on Feb. 29, 2020.
Prior Publication US 2022/0414043 A1, Dec. 29, 2022
Int. Cl. G06F 13/40 (2006.01); G06F 13/42 (2006.01)
CPC G06F 13/4013 (2013.01) [G06F 13/4239 (2013.01)] 12 Claims
OG exemplary drawing
 
1. An Avalon-to-Axi4 bus conversion method, comprising:
in case that an Avalon bus is a streaming mode of the Avalon bus (Avalon_st bus), receiving Avalon_st bus data, performing a logical process on the Avalon_st bus data, and then outputting corresponding streaming mode of an Axi4 bus (Axi4_st bus) data; and
in case that the Avalon bus is a memory mapping mode of the Avalon bus (Avalon_mm bus), receiving a signal transmitted by each channel of the Avalon_mm bus, framing and storing the signal in asynchronous First Input First Output (FIFO), and in case that a device corresponding to an Axi4 bus is ready, reading the signal from the asynchronous FIFO, and outputting the signal to a corresponding channel of the Axi4 bus according to a timing relationship of the Axi4 bus;
wherein the performing a logical process on the Avalon_st bus data and then outputting the corresponding streaming mode of the Axi4_st bus data comprises:
assigning values of a data packet end marker, data validity identifier, and device ready-state identifier in the Avalon_st bus data to corresponding interfaces of an Axi4_st bus;
performing high-low bit logic negation in units of bytes on data in the Avalon_st bus data, and then assigning a value to the corresponding interface of the Axi4_st bus; and
obtaining a valid byte position based on an invalid byte position in the Avalon_st bus data, and assigning a value at the valid byte position to the corresponding interface of the Axi4_st bus.