US 11,656,721 B2
Pixel circuit, array substrate, display panel and method of driving the same, and display device
Shengji Yang, Beijing (CN); Xue Dong, Beijing (CN); Xiaochuan Chen, Beijing (CN); Hui Wang, Beijing (CN); and Pengcheng Lu, Beijing (CN)
Assigned to BOE Technology Group Co., Ltd., Beijing (CN)
Appl. No. 16/606,349
Filed by BOE Technology Group Co., Ltd., Beijing (CN)
PCT Filed Feb. 25, 2019, PCT No. PCT/CN2019/076069
§ 371(c)(1), (2) Date Oct. 18, 2019,
PCT Pub. No. WO2019/237764, PCT Pub. Date Dec. 19, 2019.
Claims priority of application No. 201810608777.4 (CN), filed on Jun. 13, 2018.
Prior Publication US 2021/0365145 A1, Nov. 25, 2021
Int. Cl. G06F 3/042 (2006.01); G06F 3/041 (2006.01); G09G 3/3266 (2016.01); G09G 3/3275 (2016.01); G09G 3/36 (2006.01)
CPC G06F 3/0421 (2013.01) [G06F 3/04166 (2019.05); G09G 3/3266 (2013.01); G09G 3/3275 (2013.01); G09G 3/3677 (2013.01); G09G 3/3688 (2013.01); G09G 2354/00 (2013.01)] 19 Claims
OG exemplary drawing
 
1. An array substrate, comprising a thin film transistor (TFT) backplane, wherein the TFT backplane comprises:
a substrate; and
a light sensitive touch control sub-circuit and a light emitting driving control sub-circuit of a pixel circuit arranged on the substrate; and
a light emitting device of the pixel circuit on the substrate in a light outgoing direction of the array substrate, wherein the light emitting device is a top emission light emitting device,
wherein the light sensitive touch control sub-circuit comprises a light sensitive transistor,
the array substrate further comprises a light shading layer between the substrate and the light emitting device in a sub-pixel area where the pixel circuit is arranged,
the light shading layer comprises a hollowed-out area exposing the light sensitive transistor,
a planarization layer is between the light shading layer and the substrate, and
an orthographic projection of the light sensitive transistor on the substrate overlaps with an orthographic projection of the planarization layer on the substrate,
the TFT backplane further comprises a driving sub-circuit included in the light emitting driving control sub-circuit, the driving sub-circuit comprises a driving transistor and a first capacitor,
wherein an active layer of the driving transistor and an active layer of the light sensitive transistor are located on a same layer, and are both directly disposed on the substrate, and
the driving transistor and the first capacitor are located between the substrate and the light shading layer, orthographic projections of the first capacitor and the driving transistor on the substrate are within an orthographic projection of the light shading layer on the substrate.