US 11,968,911 B2
Semiconductor device and method for fabricating the same
Hung-Chan Lin, Tainan (TW); Yu-Ping Wang, Hsinchu (TW); and Chien-Ting Lin, Tainan (TW)
Assigned to UNITED MICROELECTRONICS CORP., Hsin-Chu (TW)
Filed by UNITED MICROELECTRONICS CORP., Hsin-Chu (TW)
Filed on Nov. 3, 2021, as Appl. No. 17/518,571.
Claims priority of application No. 202111158944.8 (CN), filed on Sep. 30, 2021.
Prior Publication US 2023/0097481 A1, Mar. 30, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. H10N 52/01 (2023.01); H10B 61/00 (2023.01); H10N 52/00 (2023.01); H10N 52/80 (2023.01)
CPC H10N 52/01 (2023.02) [H10B 61/00 (2023.02); H10N 52/00 (2023.02); H10N 52/80 (2023.02)] 17 Claims
OG exemplary drawing
 
1. A method for fabricating a semiconductor device, comprising:
forming a magnetic tunneling junction (MTJ) stack on a substrate;
forming a first spin orbit torque (SOT) layer on the MTJ stack;
forming a first hard mask on the first SOT layer, wherein the first hard mask comprises a conductive material;
using a second hard mask to pattern the first hard mask, the first SOT layer, and the MTJ stack to form a MTJ;
forming a second IMD layer on the first hard mask; and
performing a planarizing process to remove part of the second IMD layer so that top surfaces of the second IMD layer and the first hard mask are coplanar.