CPC H04W 72/20 (2023.01) [H04L 1/1607 (2013.01); H04L 5/0048 (2013.01); H04W 72/0446 (2013.01)] | 19 Claims |
1. A sidelink resource multiplexing apparatus, comprising:
a memory that stores a plurality of instructions; and
a processor coupled to the memory and configured to execute the instructions to:
perform transmission and/or reception of physical sidelink feedback channel (PSFCH), and perform transmission and/or reception of physical sidelink control channel (PSCCH) and/or physical sidelink shared channel (PSSCH); and
multiplex PSFCH and PSCCH/PSSCH in a predefined time division multiplexing (TDM) manner, wherein the predefined time division multiplexing (TDM) manner comprises when PSFCH of a first terminal device and PSFCH of a second terminal device are in the same slot, PSFCH durations are the same.
|