US 11,968,288 B2
Obtaining accurate timing of analog to digital converter samples in cellular modem
Lennart Karl-Axel Mathe, San Diego, CA (US); Brian Clarke Banister, San Diego, CA (US); Christos Komninakis, Solana Beach, CA (US); and Minkui Liu, San Diego, CA (US)
Assigned to QUALCOMM INCORPORATED, San Diego, CA (US)
Filed by QUALCOMM Incorporated, San Diego, CA (US)
Filed on Apr. 15, 2022, as Appl. No. 17/659,469.
Prior Publication US 2023/0336324 A1, Oct. 19, 2023
Int. Cl. H04L 7/00 (2006.01); H03M 1/12 (2006.01); H04W 56/00 (2009.01)
CPC H04L 7/0079 (2013.01) [H03M 1/1245 (2013.01); H04W 56/005 (2013.01)] 24 Claims
OG exemplary drawing
 
1. A method for determining an analog-to-digital converter (ADC) output timing in a user equipment, comprising:
obtaining a set of ADC samples generated by an ADC based on analog signals and an ADC input clock;
generating, at a first time point, a start signal indicating a starting point of capturing the set of ADC samples;
synchronizing, at a second time point, the start signal and a system clock;
generating, at a third time point, a capturing sample clock for capturing the set of ADC samples;
inputting the synchronized start signal and the capturing sample clock to a counter to determine a time difference between the second time point and the third time point; and
determining an ADC output timing of the set of ADC samples based on the time difference.