US 11,968,285 B2
Efficient memory utilization for cartesian products of rules
Gil Levy, Hod Hasharon (IL); and Aviv Kfir, Nili (IL)
Assigned to MELLANOX TECHNOLOGIES, LTD., Yokneam (IL)
Filed by MELLANOX TECHNOLOGIES, LTD., Yokneam (IL)
Filed on Feb. 24, 2022, as Appl. No. 17/679,160.
Prior Publication US 2023/0269310 A1, Aug. 24, 2023
Int. Cl. H04L 69/22 (2022.01); H03M 7/30 (2006.01); H04L 45/74 (2022.01); H04L 45/745 (2022.01)
CPC H04L 69/22 (2013.01) [H03M 7/3082 (2013.01); H04L 45/742 (2013.01); H04L 45/74591 (2022.05)] 9 Claims
OG exemplary drawing
 
1. A network device, comprising:
one or more ports, to exchange packets over a network, each packet comprising a packet header having at least first and second header fields;
action-select circuitry, to:
for a given packet, determine a first search key based on the first header field of the given packet, and a second search key based on the second header field of the given packet;
compare the first search key to a first group of compare values, and, responsively to a match between the first search key and a first compare value in the first group, output a One-Hot vector having a marker element whose position in the One-Hot vector is indicative of an index of the first compare value, which was found to match the first search key, in the first group;
generate a composite search key, by concatenating the second search key and the One-Hot vector; and
compare the composite search key to a second group of compare values, and, responsively to a match between the composite search key and a second compare value in the second group, output an action indicator for applying to the given packet; and
a packet processor, to process the packets responsively to the packet headers, including applying an action to the given packet responsively to the action indicator, which was output by the compare circuitry.