US 11,967,613 B2
Semiconductor structure
Ju-Hsien Lin, Taoyuan (TW); Jung-Tao Chung, Taoyuan (TW); Shu-Hsiao Tsai, Taoyuan (TW); Hsi-Tsung Lin, Taoyuan (TW); Chen-An Hsieh, Taoyuan (TW); Yi-Han Chen, Taoyuan (TW); and Yao-Ting Shao, Taoyuan (TW)
Assigned to WIN SEMICONDUCTORS CORP., Taoyuan (TW)
Filed by WIN SEMICONDUCTORS CORP., Taoyuan (TW)
Filed on May 16, 2023, as Appl. No. 18/318,208.
Application 18/318,208 is a division of application No. 17/146,936, filed on Jan. 12, 2021, granted, now 11,695,037.
Prior Publication US 2023/0282697 A1, Sep. 7, 2023
Int. Cl. H01L 29/06 (2006.01); H01L 27/06 (2006.01); H01L 29/417 (2006.01)
CPC H01L 29/0649 (2013.01) [H01L 27/0635 (2013.01); H01L 29/41775 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor structure, comprising:
a substrate;
an active device disposed over the substrate and in a first region of the substrate;
a passive device disposed over the substrate and in a second region of the substrate;
a shielding structure comprising a barrier layer and a ceiling layer, the barrier layer is on the passive device and the active device, and the ceiling layer is on the barrier layer; and
a passivation layer under the barrier layer and covering a top surface of the passive device, wherein an air cavity is defined by sidewalls of the barrier layer, a bottom surface of the ceiling layer, and the substrate.