CPC H01L 27/0922 (2013.01) [H01L 21/02603 (2013.01); H01L 21/28518 (2013.01); H01L 21/823807 (2013.01); H01L 21/823814 (2013.01); H01L 21/823871 (2013.01); H01L 29/0673 (2013.01); H01L 29/42392 (2013.01); H01L 29/45 (2013.01); H01L 29/66545 (2013.01); H01L 29/66742 (2013.01); H01L 29/78618 (2013.01); H01L 29/78696 (2013.01)] | 20 Claims |
1. A semiconductor device structure, comprising:
a stack of semiconductor layers spaced apart from and aligned with each other;
a first source/drain epitaxial feature in contact with a first one or more semiconductor layers of the stack of semiconductor layers;
a second source/drain epitaxial feature disposed over the first source/drain epitaxial feature, wherein the second source/drain epitaxial feature is in contact with a second one or more semiconductor layers of the stack of semiconductor layers;
a dielectric material disposed between the first source/drain epitaxial feature and the second source/drain epitaxial feature; and
a liner disposed between the first source/drain epitaxial feature and the second source/drain epitaxial feature, wherein the liner is a conformal layer and is in contact with the dielectric material, and the liner is U-shaped.
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