US 11,967,580 B2
Microelectronic assemblies with communication networks
Adel A. Elsherbini, Tempe, AZ (US); Amr Elshazly, Hillsboro, OR (US); Arun Chandrasekhar, Chandler, AZ (US); Shawna M. Liff, Scottsdale, AZ (US); and Johanna M. Swan, Scottsdale, AZ (US)
Assigned to Intel Corporation, Santa Clara, CA (US)
Filed by Intel Corporation, Santa Clara, CA (US)
Filed on Sep. 29, 2022, as Appl. No. 17/956,773.
Application 17/956,773 is a continuation of application No. 17/706,156, filed on Mar. 28, 2022.
Application 17/706,156 is a continuation of application No. 17/128,558, filed on Dec. 21, 2020, granted, now 11,437,348, issued on Sep. 6, 2022.
Application 17/128,558 is a continuation of application No. 16/648,464, granted, now 11,342,305, issued on May 24, 2022, previously published as PCT/US2017/068917, filed on Dec. 29, 2017.
Prior Publication US 2023/0018902 A1, Jan. 19, 2023
Int. Cl. H01L 23/48 (2006.01); H01L 23/498 (2006.01); H01L 25/00 (2006.01); H01L 25/065 (2023.01)
CPC H01L 25/0652 (2013.01) [H01L 23/49822 (2013.01); H01L 25/50 (2013.01)] 19 Claims
OG exemplary drawing
 
1. A microelectronic assembly, comprising:
a first redistribution layer;
a first die above the redistribution layer, the first die having a top side and a bottom side, and a first sidewall and a second sidewall between the top side and the bottom side, the second sidewall laterally opposite the first sidewall, and the first die comprising a plurality of through substrate vias;
a first conductive pillar laterally spaced apart from the first sidewall of the first die;
a second conductive pillar laterally spaced apart from the second sidewall of the first die;
a mold material on the first redistribution layer and laterally surrounding the first die, the first conductive pillar, and the second conductive pillar, the mold material in contact with the first conductive pillar, the second conductive pillar, the first sidewall of the first die, and the second sidewall of the first die;
a second redistribution layer having a top surface and a bottom surface, the bottom surface on the first conductive pillar, on the second conductive pillar, on the mold material, and over the first die;
a second die coupled to the top surface of the second redistribution layer, the second die vertically over the first die; and
a third die coupled to the top surface of the second redistribution layer, the third die vertically over the first die, and the third die laterally spaced apart from the second die, wherein the first die electrically couples the second die to the third die.