US 11,967,555 B2
Semiconductor device and manufacturing method of semiconductor device
Nam Jae Lee, Icheon-si (KR)
Assigned to SK hynix Inc., Icheon-si (KR)
Filed by SK hynix Inc., Icheon-si (KR)
Filed on Jan. 30, 2023, as Appl. No. 18/103,228.
Application 18/103,228 is a continuation of application No. 17/158,860, filed on Jan. 26, 2021, granted, now 11,594,486.
Claims priority of application No. 10-2020-0093249 (KR), filed on Jul. 27, 2020.
Prior Publication US 2023/0178485 A1, Jun. 8, 2023
Int. Cl. H01L 23/528 (2006.01); H10B 43/27 (2023.01)
CPC H01L 23/528 (2013.01) [H10B 43/27 (2023.02)] 12 Claims
OG exemplary drawing
 
1. A method of manufacturing a semiconductor device, the method comprising:
forming a stack structure including a cell sacrificial layer, a select sacrificial layer, and a stack insulating layer, which overlap with each other;
forming a first opening exposing the select sacrificial layer;
removing the select sacrificial layer through the first opening;
forming a first part of a filling sacrificial layer in an empty space formed by removing the select sacrificial layer;
forming a second opening exposing the first part of the filling sacrificial layer and the cell sacrificial layer; and
removing the first part of the filling sacrificial layer and the cell sacrificial layer.